The present invention relates to microcomputers, and more particularly, to a microcomputer incorporating a device that provides an external apparatus with operation information of a CPU to externally monitor the operation of the CPU.
To respond to the recent request for high-speed microcomputers, a microcomputer includes a CPU and a memory device, such as a PROM, for storing programs executed by the CPU. To check the operation of the microcomputer and debug the programs, the microcomputer has a device for providing the operation information of the CPU to an external monitoring apparatus, such as an emulator. The device provides the operation information to the emulator at a speed corresponding to the operation of the CPU.
FIG. 1 is a schematic block diagram of a prior art microcomputer 11. The microcomputer 11 includes a CPU 12 and an emulator interface 13, which provides operation information of the CPU 12 to an external emulator device (not shown). The CPU 12 and the emulator interface 13 are formed on the same semiconductor integrated circuit substrate together with memory devices (not shown), such as a PROM, and peripheral circuits.
The CPU 12 and the interface 13 are operated in accordance with a system clock SCLK. Further, in response to a control signal provided by the external emulator device, the CPU 12 provides its operation information to the emulator device via the interface 13. Based on the operation information, the emulator device monitors the operation of the CPU 12.
For real-time transmission of the CPU operational information to the emulator device, the high-speed microcomputer 11 requires a high-performance cable that enables data to be transmitted at the operation frequency of the microcomputer 11. Such high-performance cable is expensive and increases the cost for manufacturing microcomputers.
Therefore, a plurality of inexpensive cables are used to connect the microcomputer 11 to the external emulator device. Signals representing the operation information of the CPU 12 are transferred through the plurality of cables in a time-sharing and parallel manner. In this case, the interface frequency is lower than the operating frequency of the microcomputer 11. The connection of the inexpensive cables, however, increases the number of interface terminals and causes the microcomputer 11 to be expensive.
In another transmission method, a buffer is arranged between the CPU 12 and the interface 13 to temporarily store the operation information. The operation information is provided to the external emulator device from the buffer at a low speed. Thus, the operation information may be transferred by a small number of inexpensive cables. However, due to the difference between the operating speed of the CPU 12 and the interface speed of the interface 13, a buffer having a large capacity is required. Since the number of gates of the microcomputer increases in accordance with the capacity of the buffer, the cost of the microcomputer increases.